Integrating graphene, reduced graphene oxide onto silicon chips at room temperature

in the new method, researchers start with a silicon substrate. They top that with a layer of single-crystal titanium nitride, using area matching epitaxy to make certain the crystalline structure of the titanium nitride is aligned with the structure of the silicon. Researchers then region a layer of copper-carbon (Cu-2.zero atomic percent C) alloy on pinnacle of the titanium nitride, again the usage of domain matching epitaxy. finally, the researchers soften the surface of the alloy with nanosecond laser pulses, which draws carbon to the surface.

If the process is done in a vacuum, the carbon paperwork at the surface as graphene; if it is achieved in oxygen, it forms cross; and if achieved in a damp ecosystem followed with the aid of a vacuum, it paperwork as rGO. In all three instances, the carbon's crystalline shape is aligned with the underlying copper-carbon alloy.

"we are able to control whether or not the carbon paperwork one or two monolayers on the surface of the cloth via manipulating the intensity of the laser and the depth of the melting," says Jay Narayan, the toilet C. Fan prominent Chair Professor of materials technological know-how and Engineering at NC state and senior writer of a paper describing the work.

"The manner can easily be scaled up," Narayan says. "we've made wafers which might be  inches rectangular, and could easily cause them to lots larger, the use of lasers with better Hertz. And this is all completed at room temperature, which drives down the fee."

Graphene is an notable conductor, but it cannot be used as a semiconductor. but, rGO is a semiconductor cloth, which can be used to make electronic devices such as incorporated clever sensors and optic-digital devices.

"we've already patented the method and are planning to use it to expand smart biomedical sensors integrated with laptop chips," Narayan says.